High-Density SRAM Read Access Yield Estimation Methodology

As high-density SRAMs must be designed to ensure a substantially small failure rate, the accurate yield estimation with practically acceptable runtime of circuit simulations is highly challenging. Here, read access method for static random memory (SRAM) proposed. Instead performing SPICE runs entire SRAM circuit, proposed partitions into three parts—the control signal generation bitcell array, and sense amplifier (SA)—that determine key parameters: word-line SA enable delay, bit-line voltage difference, offset voltage. Subsequently, derives probability density these parameters from each partitioned circuits. different methods are applied derive parameters, considering respective characteristics part parameter. According our experimental results, can accelerate by 500–3000×, compared brute-force Monte Carlo simulation method, 10–100× other state-of-art methods. In addition, optimization procedure accompanied multiple revisions, that is, revisions reflected only revised part, unlike previous require SRAM.